https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113010
--- Comment #10 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jeff Law <l...@gcc.gnu.org>: https://gcc.gnu.org/g:24975a9195743e8eb4ca213f35b9221d4eeb6b59 commit r14-9284-g24975a9195743e8eb4ca213f35b9221d4eeb6b59 Author: Greg McGary <g...@rivosinc.com> Date: Sun Mar 3 14:49:49 2024 -0700 [PATCH] combine: Don't simplify paradoxical SUBREG on WORD_REGISTER_OPERATIONS [PR113010] The sign-bit-copies of a sign-extending load cannot be known until runtime on WORD_REGISTER_OPERATIONS targets, except in the case of a zero-extending MEM load. See the fix for PR112758. gcc/ PR rtl-optimization/113010 * combine.cc (simplify_comparison): Simplify a SUBREG on WORD_REGISTER_OPERATIONS targets only if it is a zero-extending MEM load. gcc/testsuite * gcc.c-torture/execute/pr113010.c: New test.
