https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114130
--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Kito Cheng <k...@gcc.gnu.org>: https://gcc.gnu.org/g:fd07a29e39f5347d6cef3e7042a32306f97a1719 commit r14-9231-gfd07a29e39f5347d6cef3e7042a32306f97a1719 Author: Kito Cheng <kito.ch...@sifive.com> Date: Wed Feb 28 16:01:52 2024 +0800 RISC-V: Fix __atomic_compare_exchange with 32 bit value on RV64 atomic_compare_and_swapsi will use lr.w to do obtain the original value, which sign extends to DI. RV64 only has DI comparisons, so we also need to sign extend the expected value to DI as otherwise the comparison will fail when the expected value has the 32nd bit set. gcc/ChangeLog: PR target/114130 * config/riscv/sync.md (atomic_compare_and_swap<mode>): Sign extend the expected value if needed. gcc/testsuite/ChangeLog: * gcc.target/riscv/pr114130.c: New. Reviewed-by: Palmer Dabbelt <pal...@rivosinc.com>
