https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110411
--- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-11 branch has been updated by jeevitha <jeevi...@gcc.gnu.org>: https://gcc.gnu.org/g:41af48a1750635a72c48a5809e713d9dd14d9655 commit r11-11257-g41af48a1750635a72c48a5809e713d9dd14d9655 Author: Jeevitha <jeevi...@linux.ibm.com> Date: Thu Aug 31 05:40:18 2023 -0500 rs6000: Don't allow AltiVec address in movoo & movxo pattern [PR110411] There are no instructions that do traditional AltiVec addresses (i.e. with the low four bits of the address masked off) for OOmode and XOmode objects. The solution is to modify the constraints used in the movoo and movxo pattern to disallow these types of addresses, which assists LRA in resolving this issue. Furthermore, the mode size 16 check has been removed in vsx_quad_dform_memory_operand to allow OOmode and XOmode, and quad_address_p already handles less than size 16. 2023-08-31 Jeevitha Palanisamy <jeevi...@linux.ibm.com> gcc/ PR target/110411 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow AltiVec address operands. (define_insn_and_split movxo): Likewise. * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove redundant mode size check. gcc/testsuite/ PR target/110411 * gcc.target/powerpc/pr110411-1.c: New testcase. * gcc.target/powerpc/pr110411-2.c: New testcase. (cherry picked from commit 9ea1248604d7b65009af32103814332f35bd33e2)
