https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94789
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target|x86_64-*-* i?86-*-* aarch64 |x86_64-*-* i?86-*-*
--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Wilco from comment #4)
> AArch64 already generates:
>
> neg w1, w1
> lsl w0, w0, w1
> ret
aarch64 is because it has a pattern to optimize this explictly:
(insn 14 9 15 2 (set (reg/i:SI 0 x0)
(ashift:SI (reg:SI 108)
(minus:QI (const_int 32 [0x20])
(subreg:QI (reg:SI 109) 0)))) "/app/example.cpp":5:1 744
{*aarch64_ashl_reg_minussi3}
(expr_list:REG_DEAD (reg:SI 108)
(expr_list:REG_DEAD (reg:SI 109)
(nil))))
Which was added in r8-3672-g59abe903987d61 . Maybe the x86_64 backend do a
similar thing?
