https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113927
--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-13 branch has been updated by Georg-Johann Lay <g...@gcc.gnu.org>: https://gcc.gnu.org/g:0f0ca42fb5556f2c6b76b017fbbd90820a728ce0 commit r13-8327-g0f0ca42fb5556f2c6b76b017fbbd90820a728ce0 Author: Georg-Johann Lay <a...@gjlay.de> Date: Thu Feb 15 13:53:34 2024 +0100 AVR: target 113927 - Simple code triggers stack frame for Reduced Tiny. The -mmcu=avrtiny cores have no ADIW and SBIW instructions. This was implemented by clearing all regs out of regclass ADDW_REGS so that constraint "w" never matched. This corrupted the subset relations of the register classes as they appear in enum reg_class. This patch keeps ADDW_REGS like for all other cores, i.e. it contains R24...R31. Instead of tests like test_hard_reg_class (ADDW_REGS, *) the code now uses avr_adiw_reg_p (*). And all insns with constraint "w" get "isa" insn attribute value of "adiw". Plus, a new built-in macro __AVR_HAVE_ADIW__ is provided, which is more specific than __AVR_TINY__. gcc/ PR target/113927 * config/avr/avr.h (AVR_HAVE_ADIW): New macro. * config/avr/avr-protos.h (avr_adiw_reg_p): New proto. * config/avr/avr.cc (avr_adiw_reg_p): New function. (avr_conditional_register_usage) [AVR_TINY]: Don't clear ADDW_REGS. Replace test_hard_reg_class (ADDW_REGS, ...) with calls to * config/avr/avr.md: Same. (attr "isa") <tiny, no_tiny>: Remove. <adiw, no_adiw>: Add. (define_insn, define_insn_and_split): When an alternative has constraint "w", then set attribute "isa" to "adiw". * config/avr/avr-c.cc (avr_cpu_cpp_builtins) [AVR_HAVE_ADIW]: Built-in define __AVR_HAVE_ADIW__. * doc/invoke.texi (AVR Options): Document it. (cherry picked from commit 5cff288c2dae4ea709df067cf398f23e214b2e80)
