https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113597
--- Comment #11 from Richard Biener <rguenth at gcc dot gnu.org> ---
In DSE the only differences is
fbt (0x7ffff51a1a50: (plus:DI (reg/v/f:DI 117 [ u ])
- (reg:DI 146 [ _44 ]))) == (address 0)
+ (reg:DI 146 [ _44 ]))) == (nil)
fbt (0x7ffff700b3c0: (reg/f:DI 64 sfp)) == (address:DI -3)
-bac false
+bac true
that's for
(mem:BLK (reg/f:DI 64 sfp) [0 A8])
vs
(mem:V4SF (plus:DI (reg/v/f:DI 117 [ u ])
(reg:DI 146 [ _44 ])) [0 MEM <__Float32x4_t> [(float * {ref-all})_42]+0
S16 A32])
from
#0 0x0000000002ff3796 in scan_reads (insn_info=0x5e5b680, gen=0x5ec2338,
kill=0x5ec2358) at /space/rguenther/src/gcc/gcc/dse.cc:3156
#1 0x0000000002ff39b1 in dse_step3_scan (bb=<basic_block 0x7ffff5160060 (5)>)
at /space/rguenther/src/gcc/gcc/dse.cc:3238
processing
(insn 62 61 64 5 (set (reg:V4SF 147 [ MEM <__Float32x4_t> [(float *
{ref-all})_42] ])
(mem:V4SF (plus:DI (reg/v/f:DI 117 [ u ])
(reg:DI 146 [ _44 ])) [0 MEM <__Float32x4_t> [(float *
{ref-all})_42]+0 S16 A32])) "include/arm_neon.h":12531:36 1274
{*aarch64_simd_movv4sf}
(expr_list:REG_DEAD (reg:DI 146 [ _44 ])
(nil)))
in this case we have _44 point to NONLOCAL only. It got arg_base_value
as base value (from the MEM_EXPR and that points-to set we could
eventually derive this very same base term as well).
But I'll note that (mem:BLK (reg/f:DI 64 sfp) [0 A8]) is artificial,
generated by DSE get_group_info via record_store on
(insn 13 12 14 2 (set (mem/c:V2x16QI (reg/f:DI 119) [0 +0 S32 A128])
(unspec:V2x16QI [
(reg:V16QI 121) repeated x2
] UNSPEC_STP)) "t.cc":12:10 discrim 1 92 {*store_pair_16}
(nil))
which is figured to be const_or_frame_p () based. That notably
lacks a MEM_EXPR (though the bare MEM means only base_alias_check would
ever be able to disambiguate here).
