https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113133
--- Comment #8 from Uroš Bizjak <ubizjak at gmail dot com> --- (In reply to Haochen Jiang from comment #6) > Aha, I see what happened. x/ymm16+ are usable for AVX512F w/o AVX512VL and > that is why I added that to allow them. > > Let me find a way to see if we can fix this. It looks to me that ix86_hard_regno_mode_ok should be fixed to allow x/ymm16+ also with EVEX512. Currently we have: /* TODO check for QI/HI scalars. */ /* AVX512VL allows sse regs16+ for 128/256 bit modes. */ if (TARGET_AVX512VL && (VALID_AVX256_REG_OR_OI_MODE (mode) || VALID_AVX512VL_128_REG_MODE (mode))) return true; so the compiler is unable to change some of the modes of the xmm16 to 128-bit mode using lowpart_subreg, e.g. DFmode to V4SFmode. Please also note that your original patch missed to add TARGET_EVEX512 to the splitter that handles float_truncate with TARGET_USE_VECTOR_FP_CONVERTS. I propose to proceed with the minimal fix from Comment #3 as a hotfix to unbreak the testcase in this PR. The real, but more involved fix is to fix ix86_hard_regno_mode_ok, which I'll leave to you.