https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112906
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Target Milestone|--- |14.0
Last reconfirmed| |2023-12-07
Ever confirmed|0 |1
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed.
auto_inc_dec pass produces:
```
(insn 23 22 25 3 (set (reg:V16QI 118 [ MEM <vector(16) unsigned char>
[(unsigned char * {ref-all})_29] ])
(mem:V16QI (post_inc:DI (reg:DI 107 [ ivtmp.13 ])) [0 MEM <vector(16)
unsigned char> [(unsigned char * {ref-all})_29]+0 S16 A8]))
"/app/example.cpp":12:9 1321 {*aarch64_simd_movv16qi}
(expr_list:REG_INC (reg:DI 107 [ ivtmp.13 ])
(nil)))
```
Combine has:
```
(insn 27 26 66 3 (parallel [
(set (reg:VNx16QI 119 [ h ])
(vec_duplicate:VNx16QI (mem:V16QI (post_inc:DI (reg:DI 107 [
ivtmp.13 ])) [0 MEM <vector(16) unsigned char> [(unsigned char *
{ref-all})_29]+0 S16 A8])))
(clobber (scratch:VNx16BI))
]) "/app/example.cpp":12:9 6406 {aarch64_vec_duplicate_vqvnx16qi_le}
(expr_list:REG_INC (reg:DI 107 [ ivtmp.13 ])
(nil)))
```
But then split1 does:
```
(insn 67 26 68 3 (set (reg:DI 126)
(post_inc:DI (reg:DI 107 [ ivtmp.13 ]))) "/app/example.cpp":12:9 -1
(expr_list:REG_INC (reg:DI 107 [ ivtmp.13 ])
(nil)))
(insn 68 67 69 3 (set (reg:VNx16BI 127)
(const_vector:VNx16BI repeat [
(const_int 1 [0x1])
])) "/app/example.cpp":12:9 -1
(nil))
(insn 69 68 66 3 (set (reg:VNx16QI 119 [ h ])
(unspec:VNx16QI [
(reg:VNx16BI 127)
(mem:V16QI (reg:DI 126) [0 MEM <vector(16) unsigned char>
[(unsigned char * {ref-all})_29]+0 S16 A8])
] UNSPEC_LD1RQ)) "/app/example.cpp":12:9 -1
(nil))
```
Which is totally bogus. You can't have a post_inc by itself ...
