[Bug middle-end/112660] missed-optimization: combine shifts when shifted out bits are known 0

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112660

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to gooncreeper from comment #1)
> This could be further extended for signed integers as we can assume for left
> shifts that shifted out bits are always 0 else UB, and always combine x << a
> >> b.

Not for C90 ... So for gimple and RTL level we can't assume that.