https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112651
Jeremy Bennett <jeremy.bennett at embecosm dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Summary|RISC-V Vector |RISC-V Vector new option
|--param=riscv-autovec-lmul |-mvect-lmul required to
|should be -mvect-lmul |force LMUL values (rather
| |than
| |--param=riscv-autovec-lmul
| |to hint at values)
--- Comment #1 from Jeremy Bennett <jeremy.bennett at embecosm dot com> ---
Updated, following the clarification in Bug 112648.
--param=riscv-autovec-lmul=<val>
is intended as a hint to the optimizer, not as a mandate to only use a
particular LMUL value.
Therefore this bug covers an enhancement (-mvect-lmul) to support RISC-V Vector
processors which do not support all LMUL values.
It appears that the RISC-V vector standard requires all LMUL values to be
supported. However the implementation of efficient LMUL != 1 on silicon is
very difficult leading at least one manufacturer to only support LMUL = 1.
As such this is an option, which should be default not be enabled, but should
be available where needed.
