https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481
--- Comment #9 from rguenther at suse dot de <rguenther at suse dot de> --- On Tue, 14 Nov 2023, ams at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112481 > > --- Comment #7 from Andrew Stubbs <ams at gcc dot gnu.org> --- > Simply changing to OPTAB_WIDEN solves the ICE, but I don't know if it does so > in a sensible way, for RISC V. > > @@ -7489,7 +7489,7 @@ store_constructor (tree exp, rtx target, int cleared, > poly_int64 size, > if (maybe_ne (GET_MODE_PRECISION (mode), nunits)) > tmp = expand_binop (mode, and_optab, tmp, > GEN_INT ((1 << nunits) - 1), target, > - true, OPTAB_DIRECT); > + true, OPTAB_WIDEN); > if (tmp != target) > emit_move_insn (target, tmp); > break; > > Here are the instructions it generates: > > (set (reg:DI 165) > (and:DI (subreg:DI (reg:SI 164) 0) > (const_int 1 [0x1]))) > (set (reg:SI 154) > (subreg:SI (reg:DI 165) 0)) > > Should I use that patch? I think it's harmless on targets where OPTAB_DIRECT > would work. I think that's sensible.