https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110790
--- Comment #9 from Uroš Bizjak <ubizjak at gmail dot com> --- (In reply to Andrew Pinski from comment #8) > I need some code generation help for gcc.target/i386/pr110790-2.c, I have a > patch where we now generate: > ``` > movq (%rdi,%rax,8), %rax > shrq %cl, %rax > andl $1, %eax > ``` > > instead of previously: > ``` > movq (%rdi,%rax,8), %rax > btq %rsi, %rax > setc %al > movzbl %al, %eax > ``` > > I suspect the sequence that contains shrq/and is better but I am 100% sure. > We still get btq when used with a conditional too. The new sequence is better. It does not create a partial reg write (setc needs a clearing XOR in fron of CC-setting instruction).
