[Bug target/112426] sched1 pessimizes codegen on aarch64 by increasing register pressure

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112426

--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Wilco from comment #4)
> That first REG_DEAD note after scheduling looks wrong:
> 
>    15: x0:DI=r93:DI+0x10
>       REG_DEAD r93:DI
>     8: [r93:DI]=r98:DI
>       REG_DEAD r98:DI
>     9: [r93:DI+0x8]=r99:DI

IIRC REG_DEADs are updated via df before IRA so they can be ignored here.