https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109154
--- Comment #78 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Tamar Christina <tnfch...@gcc.gnu.org>: https://gcc.gnu.org/g:830460d67a10549939602ba323ea3fa65fb7de20 commit r14-5287-g830460d67a10549939602ba323ea3fa65fb7de20 Author: Tamar Christina <tamar.christ...@arm.com> Date: Thu Nov 9 14:03:04 2023 +0000 AArch64: Add movi for 0 moves for scalar types [PR109154] Following the Neoverse N/V and Cortex-A optimization guides SIMD 0 immediates should be created with a movi of 0. At the moment we generate an `fmov .., xzr` which is slower and requires a GP -> FP transfer. gcc/ChangeLog: PR tree-optimization/109154 * config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Add new w -> Z case. * config/aarch64/iterators.md (Vbtype): Add QI and HI. gcc/testsuite/ChangeLog: PR tree-optimization/109154 * gcc.target/aarch64/fneg-abs_2.c: Updated. * gcc.target/aarch64/fneg-abs_4.c: Updated. * gcc.target/aarch64/dbl_mov_immediate_1.c: Updated.
