https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112447
Bug ID: 112447
Summary: risc-v regression: FAIL:
gcc.c-torture/execute/memset-3.c -O3
Product: gcc
Version: 13.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: vineetg at gcc dot gnu.org
Reporter: vineetg at gcc dot gnu.org
CC: jeffreyalaw at gmail dot com, juzhe.zhong at rivai dot ai,
lehua.ding at rivai dot ai, rdapp at gcc dot gnu.org
Target Milestone: ---
As reported in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111311#c8
we have following execute failures on trunk.
=== gcc: Unexpected fails for rv64gcv lp64d medlow ===
FAIL: gcc.c-torture/execute/memset-3.c -O3 -g execution test
The issue is an extraneous VSETVLI instruction (with wrong SEW) being generated
which creates wrong fill pattern for memset.
```
main:
[...]
.L36: ; 2. loop start for @off 0
vse8.v v1,0(t3)
vse8.v v1,0(t6)
vse8.v v1,0(s1)
vse8.v v3,0(a5)
...
; loop epilogue
li a7,15
beq a4,a7,.L171
vsetvli zero,zero,e32,m2,ta,ma <--- wrong
j .L36
```
vsetvli pass dumps:
```
Phase 3: Reduce global vsetvl infos.
Compute LCM insert and delete data:
Expr[2]: VALID (insn 2847, bb 3)
Demand fields: demand_sew_lmul demand_avl
SEW=8, VLMUL=mf2, RATIO=16, MAX_SEW=64
TAIL_POLICY=agnostic, MASK_POLICY=agnostic
AVL=(const_int 8 [0x8])
VL=(nil)
VSETVL infos after phase 3
bb 3:
probability: always (guessed)
Header vsetvl info:VALID (insn 2847, bb 3) (deleted) <---
Demand fields: demand_sew_lmul demand_avl
SEW=8, VLMUL=mf2, RATIO=16, MAX_SEW=64
TAIL_POLICY=agnostic, MASK_POLICY=agnostic
AVL=(const_int 8 [0x8])
VL=(nil)
```
So it seems LCM is deleting the valid VSETVLI insn which later causes Phase 4
to insert a different/incorrect one.
I revert the following commit and the issue goes away.
2023-10-18 f0e28d8c1371 RISC-V: Fix failed hoist in LICM of vmv.v.x
instruction
This at least tells us the cause of issue, next step is to fix the issue.
