https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111720
--- Comment #29 from JuzheZhong <juzhe.zhong at rivai dot ai> --- (In reply to Richard Biener from comment #28) > I tried to look up the requirements of __riscv_vle8_v_u8m2 in the vector > intrinsic specs but besides listing all those intrinsics the spec doesn't > contain _any_ documentation? The 2nd arg is named 'vl' which I interpret > as vector length so that's so difficult for this intrinsic? Why isn't it > just even a plain load? I read the specified 'vl' isn't exact but the > intrinsics are still strongly typed, so a VLA typed gimple load should match > here? And there should be a way to constrain the implementation somehow > since 'arr' has limited size. Is the implementation constrained to use a > vector length <= the specified 'vl'? Yes. 'vl' is vector length. The thing is that multiple types of intrinsics: __riscv_vle8_v_u8m2 __riscv_vle8_v_u8m2_tu __riscv_vle8_v_u8m2_tumu __riscv_vle8_v_u8m2_mu all of them will update elements index < vl. But for index >= vl elements, we have __riscv_vle8_v_u8m2 which don't care those value, so they can be any value. Wheras __riscv_vle8_v_u8m2_tu need index >= vl to be original old value.
