https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111973
Bug ID: 111973
Summary: [RISC-V] attribute interrupt yields unaligned stack
access
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: jonathan.jonsson at gaisler dot com
Target Milestone: ---
Created attachment 56201
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=56201&action=edit
cpp code to reproduce the issue
When adding the interrupt attribute to a function such as this:
void vstvec_ssi() __attribute__((interrupt("supervisor")));
The code generated for the interrupt attribute is corrupted by an unintended
unaligned access. I didn't have this issue in gcc-13. The generated assembly
first saves some of the float registers and then when the integer registers are
about to be saved the offset for the stack pointer gets unaligned. This does
not occur when I don't call external functions.
In relation to all of this, a question I have is if it is possible to tell GCC
to not generate code to save float and vector registers on an interrupt?
4c: 08f13027 fsd fa5,128(sp) //Aligned
50: 07013c27 fsd fa6,120(sp) //Aligned
54: 16512e23 sw t0,380(sp) //Aligned
58: 16613a23 sd t1,372(sp) //No longer aligned
5c: 16713623 sd t2,364(sp)
Command line:
riscv64-unknown-elf-g++ -mcmodel=medany -static -std=gnu++20 -fno-common
-fno-builtin march=rv64gvh_zba_zbb_zbc_zbs_zfh_zbkb_zicsr_zifencei_zicbom -O3
-ggdb -mabi=lp64 -Wcast-align -Wstack-usage=960KB -Wsign-compare
-Wmaybe-uninitialized -Wuninitialized -Wno-comment -save-temps -c -o
gcc_bug_reproduce.o gcc_bug_reproduce.cpp
GCC version:
Using built-in specs.
COLLECT_GCC=riscv64-unknown-elf-g++
COLLECT_LTO_WRAPPER=/gsl/tools/riscv-gnu-toolchain/bin/../lib/gcc/riscv64-unknown-elf/14.0.0/lto-wrapper
Target: riscv64-unknown-elf
Configured with:
/tmp/riscv-gnu-toolchain-temp/riscv-gnu-toolchain/gcc/configure
--target=riscv64-unknown-elf --prefix=/tmp/riscv-gnu-toolchain --disable-shared
--disable-threads --enable-languages=c,c++ --with-pkgversion=g0fc13e8c0e3
--with-system-zlib --enable-tls --with-newlib
--with-sysroot=/tmp/riscv-gnu-toolchain/riscv64-unknown-elf
--with-native-system-header-dir=/include --disable-libmudflap --disable-libssp
--disable-libquadmath --disable-libgomp --disable-nls
--disable-tm-clone-registry --src=.././gcc --enable-multilib --with-abi=lp64d
--with-arch=rv64imafdc --with-tune=rocket --with-isa-spec=20191213
'CFLAGS_FOR_TARGET=-Os -mcmodel=medlow' 'CXXFLAGS_FOR_TARGET=-Os
-mcmodel=medlow'
Thread model: single
Supported LTO compression algorithms: zlib
gcc version 14.0.0 20231024 (experimental) (g0fc13e8c0e3)
