[Bug target/111867] aarch64: Wrong code for bf16 literal load when the arch support +fp16

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111867

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #2)
> Maybe something like:
> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> index 62b1ae0652f..db2dde84329 100644
> --- a/gcc/config/aarch64/aarch64.cc
> +++ b/gcc/config/aarch64/aarch64.cc
> @@ -23788,7 +23788,8 @@ aarch64_float_const_representable_p (rtx x)
>      return false;
> 
>    if (GET_MODE (x) == VOIDmode
> -      || (GET_MODE (x) == HFmode && !TARGET_FP_F16INST))
> +      || (GET_MODE (x) == HFmode && !TARGET_FP_F16INST)
> +      || (GET_MODE (x) == BFmode))
>      return false;
> 
>    r = *CONST_DOUBLE_REAL_VALUE (x);

That is there are no fmov instructions for bfmode constants ...