https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
Bug ID: 111794
Summary: RISC-V: Missed SLP optimization due to mask mode
precision
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: juzhe.zhong at rivai dot ai
Target Milestone: ---
void
f (int *restrict x, short *restrict y)
{
x[0] = x[0] == 1 & y[0] == 2;
x[1] = x[1] == 1 & y[1] == 2;
x[2] = x[2] == 1 & y[2] == 2;
x[3] = x[3] == 1 & y[3] == 2;
x[4] = x[4] == 1 & y[4] == 2;
x[5] = x[5] == 1 & y[5] == 2;
x[6] = x[6] == 1 & y[6] == 2;
x[7] = x[7] == 1 & y[7] == 2;
}
Realize that we failed to vectorize this case:
https://godbolt.org/z/rWz9fjM4r
The root cause is the mask bit precision of "small mask mode" (Potentially has
bitsize smaller than 1 bytes).
If we remove this following adjust precision:
ADJUST_PRECISION (V1BI, 1);
ADJUST_PRECISION (V2BI, 2);
ADJUST_PRECISION (V4BI, 4);
ADJUST_PRECISION (RVVMF16BI, riscv_v_adjust_precision (RVVMF16BImode, 4));
ADJUST_PRECISION (RVVMF32BI, riscv_v_adjust_precision (RVVMF32BImode, 2));
ADJUST_PRECISION (RVVMF64BI, riscv_v_adjust_precision (RVVMF64BImode, 1));
It can vectorize such case but will cause bugs in other situations.
Is it possible to fix that in GCC?
