https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111634
--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Pan Li <pa...@gcc.gnu.org>: https://gcc.gnu.org/g:a809a556dc0792a34fca7b754ff96ea3ea7d1e7f commit r14-4443-ga809a556dc0792a34fca7b754ff96ea3ea7d1e7f Author: Pan Li <pan2...@intel.com> Date: Sat Oct 7 12:39:14 2023 +0800 RISC-V: Bugfix for legitimize address PR/111634 Given we have RTL as below. (plus:DI (mult:DI (reg:DI 138 [ g.4_6 ]) (const_int 8 [0x8])) (lo_sum:DI (reg:DI 167) (symbol_ref:DI ("f") [flags 0x86] <var_decl 0x7fa96ea1cc60 f>) )) When handling (plus (plus (mult (a) (mem_shadd_constant)) (fp)) (C)) case, the fp will be the lo_sum operand as above. We have assumption that the fp is reg but actually not here. It will have ICE when building with option --enable-checking=rtl. This patch would like to fix it by adding the REG_P to ensure the operand is a register. The test case gcc/testsuite/gcc.dg/pr109417.c covered this fix when build with --enable-checking=rtl. PR target/111634 gcc/ChangeLog: * config/riscv/riscv.cc (riscv_legitimize_address): Ensure object is a REG before extracting its' REGNO. Signed-off-by: Pan Li <pan2...@intel.com>
