https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111010
--- Comment #19 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-13 branch has been updated by Uros Bizjak <u...@gcc.gnu.org>: https://gcc.gnu.org/g:8e828c10249d895de5f55db58e1f10448498398f commit r13-7746-g8e828c10249d895de5f55db58e1f10448498398f Author: Uros Bizjak <ubiz...@gmail.com> Date: Wed Aug 23 16:42:38 2023 +0200 i386: Fix register spill failure with concat RTX [PR111010] Disable (=&r,m,m) alternative for 32-bit targets. The combination of two memory operands (possibly with complex addressing mode), early clobbered output, frame pointer and PIC registers uses too much registers on a register constrained 32-bit target. PR target/111010 gcc/ChangeLog: * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m) alternative for 32-bit targets. (*concat<any_or_plus:mode><dwi>3_4): Ditto.