https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110748
--- Comment #16 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
(In reply to Vineet Gupta from comment #15)
> On the branch devel/vineetg/optim-double-const-m0 I have double -0.0 working.
>
> znd:
> li a5,-1
> slli a5,a5,63
> sd a5,0(a0)
> ret
>
> There's currently an ICE for zbs
>
> IRA is undoing the split so the insn with const_int 0x80000000_00000000
> doesn't exist for final pass.
>
> expand
> ------
> (insn 6 3 0 2 (set (mem:DF (reg:DI 135)
> (const_double:DF -0.0 [-0x0.0p+0])) {*movdf_hardfloat_rv64}
>
> split1
> -----
> (insn 10 3 11 2 (set (reg:DI 136)
> (const_int [0x8000000000000000]))
>
> (insn 11 10 0 2 (set (mem:DF (reg:DI 135)
> (subreg:DF (reg:DI 136) 0))
>
> ira
> ----
> (insn 11 9 12 2 (set (mem:DF (reg:DI 135)
> (const_double:DF -0.0 [-0x0.0p+0])) {*movdf_hardfloat_rv64}
So IRA is doing the equivalent replacement for a register which is referenced
exactly twice: set once and used once, w/o any reg pressure considerations [1].
[1] https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627212.html
There seems to be no easy way around it.
