https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68360
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
See Also| |https://gcc.gnu.org/bugzill
| |a/show_bug.cgi?id=107601
--- Comment #8 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Thomas Koenig from comment #7)
> Using an indexed load byte/store byte would be an advantage for foo, at
> least.
That would be more related to PR 107601 and less to do with this issue. Since
for riscv SLOW_BYTE_ACCESS is set, then all bitfields accesses are widen. But
then you want to have them widen normally; otherwise you get other bad code
generation ...
Note riscv with zbs in the testcase in comment #7 will be one bseti:
ld a5,0(a0)
bseti a5,a5,42
sd a5,0(a0)
So it is less of an issue ...
