https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106895
--- Comment #13 from Nicholas Piggin <npiggin at gmail dot com> ---
(In reply to Segher Boessenkool from comment #12)
> > I guess that would be annoying if you couldn't have modifiers on constraints
>
> There is no such thing as "operand modifiers". There are *output* modifiers:
> they change how an operand is *printed*, they do not change the operand in
> any
> way, shape, or form.
No I mean like x, y, z for different register pairs, or Pn where n=0..4, eI,
eP, eQ for different immediates.
If they're practically just implemented as another constraint, what is really
the big deal with adding a even/odd GPR pair constraint anyway? You say it's
2^T^N additional constraints. As far as I can tell it turns out to be one extra
constrain, or maybe 2 if you need one that excludes r0.
>
> > or a bad algorithm for working them out. Fair enough.
>
> No idea what you mean here?
If you can't deal well with more constraints.
>
> > > > or why TI doesn't work but PTI apparently would,
> > >
> > > Because this is exactly what PTImode is *for*!
> >
> > Right I accept it is, I meant I just would not have been able to work it out
> > (assuming if PTI was documented it would be "Partial Tetra Integer" and be
> > no more useful than the other P?I type documentation.
>
> For the rs6000 port, multi-register operands are not restricted to aligned
> register numbers ("even/odd pairs"). (Some other ports do have this). We
> use
> the existing PTI mode for that (it also can be allocated in GPRs only, never
> in
> VSRs, unlike TImode).
>
> "Partial" does not have much meaning here. A minority of ports use partial
> integer words for what they were introduced for originally: modes that are
> smaller than a full register, say, a 24-bit mode when registers are 32 bits.
>
> We use it as another integer mode that is the same size. It is unfortunate
> that we still have to resort to such tricks.
Okay that explains it, thank you.
