https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110039
Bug ID: 110039 Summary: FAIL: gcc.target/aarch64/rev16_2.c scan-assembler-times rev16\\tw[0-9]+ 2 Product: gcc Version: 13.0 Status: UNCONFIRMED Keywords: missed-optimization Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ktkachov at gcc dot gnu.org Target Milestone: --- Target: aarch64 I think after g:d8545fb2c71683f407bfd96706103297d4d6e27b the test regresses on aarch64. We now generate: __rev16_32_alt: rev w0, w0 ror w0, w0, 16 ret __rev16_32: rev w0, w0 ror w0, w0, 16 ret whereas before it was: __rev16_32_alt: rev16 w0, w0 ret __rev16_32: rev16 w0, w0 ret I think the GIMPLE at expand time is better and the RTL that it tries to match is simpler: Failed to match this instruction: (set (reg:SI 95) (rotate:SI (bswap:SI (reg:SI 96)) (const_int 16 [0x10]))) So maybe it's simply a matter of adding that pattern to aarch64.md. Anyway, filing this here to track the regression