https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89049

--- Comment #18 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Note the code generation in GCC 12+ seems decent.

The IR changed in fact.
GCC 11 has:

  vect__4.5_19 = MEM <vector(4) float> [(float *)_2];
  stmp_r_11.6_20 = BIT_FIELD_REF <vect__4.5_19, 32, 0>;
  stmp_r_11.6_21 = r_16 + stmp_r_11.6_20;
  stmp_r_11.6_22 = BIT_FIELD_REF <vect__4.5_19, 32, 32>;
  stmp_r_11.6_23 = stmp_r_11.6_21 + stmp_r_11.6_22;
  stmp_r_11.6_24 = BIT_FIELD_REF <vect__4.5_19, 32, 64>;
  stmp_r_11.6_25 = stmp_r_11.6_23 + stmp_r_11.6_24;
  stmp_r_11.6_26 = BIT_FIELD_REF <vect__4.5_19, 32, 96>;

While GCC 12+ does:

  _3 = &MEM <vector(4) float> [(float *)_2];
  stmp_r_11.7_26 = BIT_FIELD_REF <MEM <vector(4) float> [(float *)_3], 32, 96>;
  stmp_r_11.7_24 = BIT_FIELD_REF <MEM <vector(4) float> [(float *)_3], 32, 64>;
  stmp_r_11.7_22 = BIT_FIELD_REF <MEM <vector(4) float> [(float *)_3], 32, 32>;
  stmp_r_11.7_20 = BIT_FIELD_REF <MEM <vector(4) float> [(float *)_3], 32, 0>;

Which I think was done by r12-2728-g2724d1bba6b364 .

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