[Bug c/109743] New: RISC-V: Unnecessary VSETVLI of the RVV intrinsic in loop

[pan2.li at intel dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109743

            Bug ID: 109743
           Summary: RISC-V: Unnecessary VSETVLI of the RVV intrinsic in
                    loop
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: pan2.li at intel dot com
  Target Milestone: ---

Created attachment 55004
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55004&action=edit
Test file for the unnecessary VSETVL for RVV intrinsic.

Assume we have the below example code, it looks like we can eliminate 2 VSETVL
instructions.

#include "riscv_vector.h"

void
foo2 (int32_t *a, int32_t *b, int n)
{
  if (n <= 0)
      return;
  int i = n;
  size_t vl = __riscv_vsetvl_e32m1 (i);

  for (; i >= 0; i--)
  {
    vint32m1_t v = __riscv_vle32_v_i32m1 (a, vl);
    __riscv_vse32_v_i32m1 (b, v, vl);

    if (i >= vl)
      continue;

    if (i == 0)
      return;

    vl = __riscv_vsetvl_e32m1 (i);
  }
}

When compile with option '-march=rv64gc_zve64d -mabi=lp64d -O3 test.c -c -S -o
-', it will generate the assembly code like below.

foo2:
.LFB2:
        .cfi_startproc
        ble     a2,zero,.L1
        mv      a4,a2
        li      a3,-1
        vsetvli a5,a2,e32,m1,ta,mu
        vsetvli zero,a5,e32,m1,ta,ma  <- can be eliminated.
.L5:
        vle32.v v1,0(a0)
        vse32.v v1,0(a1)
        bgeu    a4,a5,.L3
.L10:
        beq     a2,zero,.L1
        vsetvli a5,a4,e32,m1,ta,mu
        addi    a4,a4,-1
        vsetvli zero,a5,e32,m1,ta,ma  <- can be eliminated.
        vle32.v v1,0(a0)
        vse32.v v1,0(a1)
        addiw   a2,a2,-1
        bltu    a4,a5,.L10
.L3:
        addiw   a2,a2,-1
        addi    a4,a4,-1
        bne     a2,a3,.L5
.L1:
        ret

GCC version:
riscv64-unknown-linux-gnu-gcc (gd7cb9720ed5) 14.0.0 20230503 (experimental)
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