https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78952
--- Comment #10 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>: https://gcc.gnu.org/g:272484dae6b5264baa0f41eba80a9521e9b7ecf5 commit r14-117-g272484dae6b5264baa0f41eba80a9521e9b7ecf5 Author: Uros Bizjak <ubiz...@gmail.com> Date: Thu Apr 20 16:51:56 2023 +0200 i386: Handle sign-extract for QImode operations with high registers [PR78952] Introduce extract_operator predicate to handle both, zero-extract and sign-extract extract operations with expressions like: (subreg:QI (zero_extract:SWI248 (match_operand 1 "int248_register_operand" "0") (const_int 8) (const_int 8)) 0) As shown in the testcase, this will enable generation of QImode instructions with high registers when signed arguments are used. gcc/ChangeLog: PR target/78952 * config/i386/predicates.md (extract_operator): New predicate. * config/i386/i386.md (any_extract): Remove code iterator. (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate. (*cmpqi_ext<mode>_1): Ditto. (*cmpqi_ext<mode>_2): Ditto. (*cmpqi_ext<mode>_3_mem_rex64): Ditto. (*cmpqi_ext<mode>_3): Ditto. (*cmpqi_ext<mode>_4): Ditto. (*extzvqi_mem_rex64): Ditto. (*extzvqi): Ditto. (*insvqi_2): Ditto. (*extendqi<SWI24:mode>_ext_1): Ditto. (*addqi_ext<mode>_0): Ditto. (*addqi_ext<mode>_1): Ditto. (*addqi_ext<mode>_2): Ditto. (*subqi_ext<mode>_0): Ditto. (*subqi_ext<mode>_2): Ditto. (*testqi_ext<mode>_1): Ditto. (*testqi_ext<mode>_2): Ditto. (*andqi_ext<mode>_0): Ditto. (*andqi_ext<mode>_1): Ditto. (*andqi_ext<mode>_1_cc): Ditto. (*andqi_ext<mode>_2): Ditto. (*<any_or:code>qi_ext<mode>_0): Ditto. (*<any_or:code>qi_ext<mode>_1): Ditto. (*<any_or:code>qi_ext<mode>_2): Ditto. (*xorqi_ext<mode>_1_cc): Ditto. (*negqi_ext<mode>_2): Ditto. (*ashlqi_ext<mode>_2): Ditto. (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto. gcc/testsuite/ChangeLog: PR target/78952 * gcc.target/i386/pr78952-4.c: New test.