https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108812
--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by HaoChen Gui <guih...@gcc.gnu.org>: https://gcc.gnu.org/g:a213e2c965382c24fe391ee5798effeba8da0fdf commit r13-7134-ga213e2c965382c24fe391ee5798effeba8da0fdf Author: Haochen Gui <guih...@gcc.gnu.org> Date: Tue Apr 11 08:55:56 2023 +0800 rs6000: correct vector sign extend builtins on Big Endian gcc/ PR target/108812 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to... (vsx_sign_extend_v16qi_<mode>): ... this. (vsx_sign_extend_hi_<mode>): Rename to... (vsx_sign_extend_v8hi_<mode>): ... this. (vsx_sign_extend_si_v2di): Rename to... (vsx_sign_extend_v4si_v2di): ... this. (vsignextend_qi_<mode>): Remove. (vsignextend_hi_<mode>): Remove. (vsignextend_si_v2di): Remove. (vsignextend_v2di_v1ti): Remove. (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si with gen_vsx_sign_extend_v16qi_v4si. * config/rs6000/rs6000.md (split for DI constant generation): Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si. (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si. * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d): Set bif-pattern to vsx_sign_extend_v16qi_v2di. (__builtin_altivec_vsignextsb2w): Set bif-pattern to vsx_sign_extend_v16qi_v4si. (__builtin_altivec_visgnextsh2d): Set bif-pattern to vsx_sign_extend_v8hi_v2di. (__builtin_altivec_vsignextsh2w): Set bif-pattern to vsx_sign_extend_v8hi_v4si. (__builtin_altivec_vsignextsw2d): Set bif-pattern to vsx_sign_extend_si_v2di. (__builtin_altivec_vsignext): Set bif-pattern to vsx_sign_extend_v2di_v1ti. * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di, gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di. gcc/testsuite/ PR target/108812 * gcc.target/powerpc/p9-sign_extend-runnable.c: Set corresponding expected vectors for Big Endian. * gcc.target/powerpc/int_128bit-runnable.c: Likewise.
