https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109035
--- Comment #5 from chenglulu <chenglulu at loongson dot cn> ---
On AARCH64:
$cat t.c
int test(int x)
{
char buf[128 << 10];
return buf[x];
}
$cat t-1.c
int test(int x)
{
char buf[0xfffffff];
return buf[x];
}
The generated assemblies are as follows:
t.s | t-1.s
test: |test:
.LFB0: |.LFB0:
.cfi_startproc | .cfi_startproc
sub sp, sp, #131072 | mov x12, 16
.cfi_def_cfa_offset 131072 | mov x2, 16
ldrb w0, [sp, w0, sxtw] | movk x12, 0x1000, lsl 16
add sp, sp, 131072 | sub sp, sp, x12
.cfi_def_cfa_offset 0 | .cfi_def_cfa_offset 268435472
ret | movk x2, 0x1000, lsl 16
.cfi_endproc | mov x1, -268435456
.LFE0: | add x1, x2, x1
.size test, .-test | add x1, sp, x1
| str x1, [sp, 8]
| ldrb w0, [x1, w0, sxtw]
| add sp, sp, x12
| .cfi_def_cfa_offset 0
| ret
In my opinion, not only the instruction "str x1, [sp, 8]" is redundant in
t-1.s.
The following instructions are redundant:
"movk x2, 0x1000, lsl 16
mov x1, -268435456
add x1, x2, x1
add x1, sp, x1
str x1, [sp, 8]"
Comparing the intermediate results of the two test cases t.c t-1.c reload pass
optimization, I found the reason for these redundant instructions.
In t.c,
(insn 7 15 12 2 (set (reg/f:DI 96)
(plus:DI (reg/f:DI 64 sfp)
(const_int -131072 [0xfffffffffffe0000]))) "t-1.c":4:12 153
{*adddi3_aarch64}
(expr_list:REG_EQUIV (plus:DI (reg/f:DI 64 sfp)
(const_int -131072 [0xfffffffffffe0000]))
(nil)))
It will be deleted after reload.
In t-1.c, the behavior of insn 7 in t.c is realized by two instructions
(insn 7 16 8 2 (set (reg:DI 97)
(const_int -268435456 [0xfffffffff0000000])) "t.c":4:12 65
{*movdi_aarch64}
(expr_list:REG_EQUIV (const_int -268435456 [0xfffffffff0000000])
(nil)))
(insn 8 7 13 2 (set (reg:DI 96)
(plus:DI (reg/f:DI 64 sfp)
(reg:DI 97))) "t.c":4:12 153 {*adddi3_aarch64}
(expr_list:REG_DEAD (reg:DI 97)
(expr_list:REG_EQUIV (plus:DI (reg/f:DI 64 sfp)
(const_int -268435456 [0xfffffffff0000000]))
(nil))))
Due to the problem of reload pass optimization, these two instructions are not
deleted, thus generating redundant instructions.
