https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108580
--- Comment #4 from postmaster at raasu dot org --- I'm not mixing things... The assembly code clearly says it's using 32-bit shift. Both with 32-bit and 64-bit architectures by default left-hand side of shift operation is 32 bits (EAX instead of RAX) and right-hand size is 8 bits (CL instead of CX, ECX or RCX). Using "1U << bits" to explicitly force unsigned 32-bit shift would be incorrect code. "(size_t)1 << bits", which is also "incorrect" code, would surprisingly result in correct code generation with both 32-bit and 64-bit targets. Result of any left shift involving negative numbers, including left-shifting non-zero bit to highest bit of signed integer, is undefined.
