https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108229
--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Roger Sayle <sa...@gcc.gnu.org>: https://gcc.gnu.org/g:de59d8bd163a4b2e50ab566441ab49d7212c3356 commit r13-4976-gde59d8bd163a4b2e50ab566441ab49d7212c3356 Author: Roger Sayle <ro...@nextmovesoftware.com> Date: Tue Jan 3 13:37:31 2023 +0000 PR target/108229: A minor STV compute_convert_gain tweak on x86. This patch addresses PR target/108229, which is a change in code generation during the STV pass, due to the recently approved patch to handle vec_select (reductions) in the vector unit. The recent change is innocent, but exposes a latent STV "gain" calculation issue that is benign (or closely balanced) on most microarchitectures. The issue is when STV considers converting PLUS with a MEM operand. On TARGET_64BIT (m=1): addq 24(%rdi), %rdx // 4 bytes or with -m32 (m=2) addl 24(%esi), %eax // 3 bytes adcl 28(%esi), %edx // 3 bytes is being converted by STV to vmovq 24(%rdi), %xmm5 // 5 bytes vpaddq %xmm5, %xmm4, %xmm4 // 4 bytes The current code in general_scalar_chain::compute_convert_gain considers that scalar unit addition is replaced with a vector unit addition (usually about the same cost), but doesn't consider anything special about MEM operands, assuming that a scalar load gains/costs nothing compared to a vector load. We can allow the backend slightly better fine tuning by including in the gain calculation that m scalar loads are being replaced by one vector load, and when optimizing for size including that we're increasing code size (e.g. an extra vmovq instruction for a MEM operand). This patch is a win on the CSiBE benchmark when compiled with -Os. 2023-01-03 Roger Sayle <ro...@nextmovesoftware.com> gcc/ChangeLog PR target/108229 * config/i386/i386-features.cc (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider the gain/cost of converting a MEM operand.
