https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108086
--- Comment #13 from Richard Biener <rguenth at gcc dot gnu.org> --- (In reply to Richard Biener from comment #12) > A regression from GCC 10 which compiles this in 90s at -O1. > > Richard? Can you please look at this special-case of BB0 insn_info? The following might be one way to "fix" it (until we do a bigger testcase) diff --git a/gcc/rtl-ssa/insns.h b/gcc/rtl-ssa/insns.h index f7215972845..b0144f258b2 100644 --- a/gcc/rtl-ssa/insns.h +++ b/gcc/rtl-ssa/insns.h @@ -403,8 +403,7 @@ private: // MAX_RECOG_OPERANDS is the maximum number of pseudos that can be // defined by an instruction, so the number of definitions should fit // easily in 16 bits. - unsigned int m_num_uses; - unsigned int m_num_defs : 16; + unsigned int m_num_uses : 24; // Flags returned by the accessors above. unsigned int m_is_debug_insn : 1; @@ -412,9 +411,13 @@ private: unsigned int m_is_asm : 1; unsigned int m_has_pre_post_modify : 1; unsigned int m_has_volatile_refs : 1; + // For future expansion. + unsigned int m_spare : 3; + // Keep 32bit aligned + unsigned int m_num_defs : 24; // For future expansion. - unsigned int m_spare : 11; + unsigned int m_spare : 8; // The program point at which the instruction occurs. //
