https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106585
--- Comment #7 from Jeffrey A. Law <law at gcc dot gnu.org> --- Raphael and I are poking at this a bit. I can't convince myself that it's actually safe to use GPR for the bit manipulation patterns. For rv64 I'm pretty sure the b* instructions are operating on 64bit quantities only. Meaning they might twiddle the SI sign bit without extending. If we were to change these patterns to use GPR and the result then fed an addw (for example) then we would have inconsistent register state as operand twiddled by the prior b* pattern wouldn't have been sign extended. To be clear, I think this is a limitation imposed by the ISA docs, not GCC where this will be reasonably well defined. With that in mind I think the only path forward is new patterns that (sadly) use explicit subregs for sources, but still set a DImode destination. I'm the newbie here, so if I've misinterpreted the ISA docs incorrectly, don't hesitate to let me know.