https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108004
--- Comment #3 from HaoChen Gui <guihaoc at gcc dot gnu.org> --- (In reply to Andrew Pinski from comment #2) > Especially when it comes to signed comparisons. >From the ISA, For all fixed-point instructions in which Rc=1, and for addic., andi., and andis., the first three bits of CR Field 0 (bits 32:34 of the Condition Register) are set by signed comparison of the result to zero, and the fourth bit of CR Field 0 (bit 35 of the Condition Register) is copied from the SO field of the XER.
