[Bug target/106585] RISC-V: Mis-optimized code gen for zbs

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106585

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(define_insn "*bset<mode>"
  [(set (match_operand:X 0 "register_operand" "=r")
        (ior:X (ashift:X (const_int 1)
                         (match_operand:QI 2 "register_operand" "r"))
               (match_operand:X 1 "register_operand" "r")))]
  "TARGET_ZBS"
  "bset\t%0,%1,%2"
  [(set_attr "type" "bitmanip")])

It uses X iterator here instead of GPR, hmmm ...