https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102224
--- Comment #17 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The releases/gcc-10 branch has been updated by Jakub Jelinek <ja...@gcc.gnu.org>: https://gcc.gnu.org/g:c7b00fbc469bc9c0a486b48bc349dba13881241e commit r10-10641-gc7b00fbc469bc9c0a486b48bc349dba13881241e Author: Jakub Jelinek <ja...@redhat.com> Date: Wed Sep 8 11:25:31 2021 +0200 i386: Fix up @xorsign<mode>3_1 [PR102224] As the testcase shows, we miscompile @xorsign<mode>3_1 if both input operands are in the same register, because the splitter overwrites op1 before with op1 & mask before using op0. For dest = xorsign op0, op0 we can actually simplify it from dest = (op0 & mask) ^ op0 to dest = op0 & ~mask (aka abs). The expander change is an optimization improvement, if we at expansion time know it is xorsign op0, op0, we can emit abs right away and get better code through that. The @xorsign<mode>3_1 is a fix for the case where xorsign wouldn't be known to have same operands during expansion, but during RTL optimizations they would appear. We need to use earlyclobber, we require dest and op1 to be the same but op0 must be different because we overwrite op1 first. 2021-09-08 Jakub Jelinek <ja...@redhat.com> PR target/102224 * config/i386/i386.md (xorsign<mode>3): If operands[1] is equal to operands[2], emit abs<mode>2 instead. (@xorsign<mode>3_1): Add early-clobber for output operand. * gcc.dg/pr102224.c: New test. * gcc.target/i386/avx-pr102224.c: New test. (cherry picked from commit a7b626d98a9a821ffb33466818d6aa86cac1d6fd)
