https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105463
--- Comment #4 from Richard Earnshaw <rearnsha at gcc dot gnu.org> --- Vector loads on MVE need to be lane-sized aligned. I think the movmisalign pattern for MVE needs to emit VLDRB.8 regardless of the mode, rather than an inner-mode sized access. Fortunately, for little-endian this makes no difference to the internal representation.
