https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105247
--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jakub Jelinek <ja...@gcc.gnu.org>: https://gcc.gnu.org/g:ba2f60499dd4a3bc1bb4e99fa12dda3bc1548519 commit r12-8158-gba2f60499dd4a3bc1bb4e99fa12dda3bc1548519 Author: Jakub Jelinek <ja...@redhat.com> Date: Thu Apr 14 13:47:34 2022 +0200 simplify-rtx: Don't assume shift count has the same mode as the shift [PR105247] The following testcase ICEs on ia64. It is UB at runtime, but we shouldn't ICE on it... The problem is that on ia64, the shift count (last operand of ASHIFT etc.) is promoted to DImode (using zero-extension), while most other targets use much narrower modes (say QImode). If we try to simplify a shift and the shift count is CONST_INT or other VOIDmode integer constant which isn't properly sign extended for the first operand's mode (in the testcase the shift count is 0xfffffff8U and it is a SImode shift), then we ICE during wide_int wop1 = pop1; in the first hunk, INTVAL == 0xfffffff8U is not valid for SImode. I think in theory we could run into this even on other targets, say if they use SImode or HImode shift counts for e.g. QImode shifts. I hope word size is the upper bound of what a reasonable target should use, using e.g. multiple registers for the shift count is insane, so the following patch if op1 has VOIDmode and int_mode is narrower than word uses word_mode for extraction of the value. 2022-04-14 Jakub Jelinek <ja...@redhat.com> PR target/105247 * simplify-rtx.cc (simplify_const_binary_operation): For shifts or rotates by VOIDmode constant integer shift count use word_mode for the operand if int_mode is narrower than word. * gcc.c-torture/compile/pr105247.c: New test.
