[Bug rtl-optimization/103775] [12 Regression] Assembler messages: Warning: unpredictable transfer with writeback -- `ldrb w0,[x0,16]!'

[jakub at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103775

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |jakub at gcc dot gnu.org

--- Comment #6 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
I think this is a REE bug.
However inefficient (but we get that because of -Og and
-fno-forward-propagate),
(insn 12 39 13 2 (set (reg:SI 1 x1 [orig:93 _2 ] [93])
        (zero_extend:SI (mem/c:QI (pre_modify:DI (reg/f:DI 0 x0 [114])
                    (plus:DI (reg/f:DI 0 x0 [114])
                        (const_int 16 [0x10]))) [1 u128_1+0 S1 A128])))
"pr103775.c":5:35 117 {*zero_extendqisi2_aarch64}
     (expr_list:REG_INC (reg/f:DI 0 x0 [114])
        (nil)))
(insn 13 12 14 2 (set (reg:DI 0 x0 [orig:112 _2 ] [112])
        (zero_extend:DI (reg:SI 1 x1 [orig:93 _2 ] [93]))) "pr103775.c":5:16
111 {*zero_extendsidi2_aarch64}
     (nil))
is valid, but turning that into:
(insn 12 39 44 2 (set (reg:DI 0 x0)
        (zero_extend:DI (mem/c:QI (pre_modify:DI (reg/f:DI 0 x0 [114])
                    (plus:DI (reg/f:DI 0 x0 [114])
                        (const_int 16 [0x10]))) [1 u128_1+0 S1 A128])))
"pr103775.c":5:35 119 {*zero_extendqidi2_aarch64}
     (expr_list:REG_INC (reg/f:DI 0 x0 [114])
        (nil)))
(insn 44 12 14 2 (set (reg:DI 1 x1)
        (reg:DI 0 x0)) "pr103775.c":5:35 -1
     (nil))
is invalid, as one instruction can't set the same register multiple times.