[Bug rtl-optimization/104950] GCC does not emit branchless code for load next to each other

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104950

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
Ah, on aarch64 we get

        cmp     w0, 0
        add     x0, x1, 4
        csel    x0, x0, x1, eq
        ldr     w0, [x0]

so we do not load from the possibly trapping mem.  With the testcase I provided
and -fno-tree-sink on x86_64 we get

        movl    4(%rsi), %eax
        testl   %edi, %edi
        cmove   8(%rsi), %eax

which would be prone to the issue.  I suppose ifcvt is oddly restricted for the
first case.