https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104868
--- Comment #4 from Michael Meissner <meissner at gcc dot gnu.org> --- In looking at it, the reason is the convert from DImode to TImode has several constraints. The constraint that matters in this case has the output being an Altivec register, while the input is a GPR register. The vsx_splat_v2di pattern that is called from the extendidti2 define_insn_and_split has a constraint of 'b' (i.e. disallow register GPR 0), while the extendidti2 insn has a constraint of 'r' (i.e. allow any GPR register). A simple fix is to change the constant in extendditi2 to be 'b' instead of 'r'. The reason GPR 0 is excluded is the mtvsrdd instruction uses a 0 in the RA field to indicate put a zero into the upper 64 bits.
