https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104853
Bug ID: 104853
Summary: [RISC-V] -march=rv64g not including extension Zifencei
Product: gcc
Version: 11.2.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: i at rvalue dot moe
Target Milestone: ---
I'm trying to compile some code including inline assembly instruction
`fence.i`. According to RISC-V ISA spec, G is defined as abbreviation for
IMAFDZicsrZifencei, which includes instruction `fence.i`. But I get assembler
message indicating that `fence.i` is unrecognized.
I report this to GCC instead of binutils because when I use `gcc -S` and then
use `as` manually, it works fine.
Also, it works fine before I upgrade to GCC 11.2.0
Minimum recurrence:
$ gcc --version
gcc (GCC) 11.2.0
Copyright (C) 2021 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
$ cat > test.c
int main(){
asm volatile("fence.i" ::: "memory");
}
$ gcc -c test.c -march=rv64g
test.c: Assembler messages:
test.c:2: Error: unrecognized opcode `fence.i'
Manually use `as`:
$ gcc -S test.c -march=rv64g -o test.s
$ as -march=rv64g test.s -o test.o
$ objdump -d test.o
test.o: file format elf64-littleriscv
Disassembly of section .text:
0000000000000000 <main>:
0: ff010113 addi sp,sp,-16
4: 00813423 sd s0,8(sp)
8: 01010413 addi s0,sp,16
c: 0000100f fence.i
10: 00000793 li a5,0
14: 00078513 mv a0,a5
18: 00813403 ld s0,8(sp)
1c: 01010113 addi sp,sp,16
20: 00008067 ret
