https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104345
--- Comment #11 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Tom de Vries <vr...@gcc.gnu.org>: https://gcc.gnu.org/g:6d98e83b2c919bd9fba2c61333d613bafc37357f commit r12-7168-g6d98e83b2c919bd9fba2c61333d613bafc37357f Author: Roger Sayle <ro...@nextmovesoftware.com> Date: Tue Feb 8 20:56:55 2022 +0100 nvptx: Tweak constraints on copysign instructions Many thanks to Thomas Schwinge for confirming my hypothesis that the register usage regression, PR target/104345, is solely due to libgcc's _muldc3 function. In addition to the isinf functionality in the previously proposed nvptx patch at https://gcc.gnu.org/pipermail/gcc-patches/2022-January/588453.html which significantly reduces the number of instructions in _muldc3, the patch below further reduces both the number of instructions and the number of explicitly declared registers, by permitting floating point constant immediate operands in nvptx's copysign instruction. Fingers-crossed, the combination with all of the previous proposed nvptx patches improves things. Ultimately, increasing register usage from 50 to 51 registers, reducing the number of concurrent threads by ~2%, can easily be countered if we're now executing significantly fewer instructions in each kernel, for a net performance win. This patch has been tested on nvptx-none hosted on x86_64-pc-linux-gnu with a "make" and "make -k check" with no new failures. gcc/ChangeLog: * config/nvptx/nvptx.md (copysign<mode>3): Allow immediate floating point constants as operands 1 and/or 2.
