[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>:

https://gcc.gnu.org/g:2b399dbabd48639ab4daac462c9d82c6cf3f99cc

commit r12-7146-g2b399dbabd48639ab4daac462c9d82c6cf3f99cc
Author: Uros Bizjak <ubiz...@gmail.com>
Date:   Wed Feb 9 20:18:10 2022 +0100

    i386: Force inputs to a register to avoid lowpart_subreg failure [PR104458]

    Input operands can be in the form of:

            (subreg:DI (reg:V2SF 96) 0)

    which chokes lowpart_subreg. Force inputs to a register, which is
    preferable even when the input operand is from memory.

    2022-02-09  Uroš Bizjak  <ubiz...@gmail.com>

    gcc/ChangeLog:

            PR target/104458
            * config/i386/i386-expand.cc (ix86_split_idivmod):
            Force operands[2] and operands[3] into a register..

    gcc/testsuite/ChangeLog:

            PR target/104458
            * gcc.target/i386/pr104458.c: New test.