[Bug middle-end/102517] [12 regression] regressions on aarch64 since r12-3899

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102517

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Earnshaw <rearn...@gcc.gnu.org>:

https://gcc.gnu.org/g:62eb400b51f8a552320a250b3ac0b5d2ebd8927f

commit r12-6775-g62eb400b51f8a552320a250b3ac0b5d2ebd8927f
Author: Richard Earnshaw <rearn...@arm.com>
Date:   Thu Jan 20 15:41:37 2022 +0000

     aarch64: allow ld1/stq in test output [PR102517]

    Following the changes to the inline memcpy operations get expanded, we
    now generate ld1/st1 using a 128-bit vector register rather than ldp
    with Q registers.  The behaviour is equivalent, so relax the tests to
    permit either variant.

    gcc/testsuite/ChangeLog:

            PR target/102517
            * gcc.target/aarch64/cpymem-q-reg_1.c: Allow ld1 and st1 for the
            memcpy expansion.