https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95737
--- Comment #9 from HaoChen Gui <guihaoc at gcc dot gnu.org> ---
Add a pattern to convert the plus mode to DI.
+(define_insn_and_split "*my_split"
+ [(set (match_operand:DI 0 "gpc_reg_operand")
+ (sign_extend:DI (plus:SI (match_operand:SI 1 "ca_operand")
+ (const_int -1))))]
+ ""
+ "#"
+ ""
+ [(parallel [(set (match_dup 0)
+ (plus:DI (match_dup 2)
+ (const_int -1)))
+ (clobber (match_dup 2))])]
+{
+ operands[2] = copy_rtx (operands[1]);
+ PUT_MODE (operands[2], DImode);
+})
With the patch, the "extsw" could be optimized out. I compared the performance
between P8 code (with the patch) and P9 code. The performance of P9 is better.
ISA says that computation with CA causes additional latency. It should be true.
The only concern is P9 code uses more register.
