[Bug target/102811] vcvtph2ps and vcvtps2ph should be used to convert _Float16 to SFmode with -mf16c

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102811

--- Comment #23 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuho...@gcc.gnu.org>:

https://gcc.gnu.org/g:11d0a2af33910c6d243e7265fb7ea04d2bc89b25

commit r12-5574-g11d0a2af33910c6d243e7265fb7ea04d2bc89b25
Author: liuhongt <hongtao....@intel.com>
Date:   Mon Nov 29 10:01:42 2021 +0800

    Optimize _Float16 usage for non AVX512FP16.

    1. No memory is needed to move HI/HFmode between GPR and SSE registers
    under TARGET_SSE2 and above, pinsrw/pextrw are used for them w/o
    AVX512FP16.
    2. Use gen_sse2_pinsrph/gen_vec_setv4sf_0 to replace
    ix86_expand_vector_set in extendhfsf2/truncsfhf2 so that redundant
    initialization cound be eliminated.

    gcc/ChangeLog:

            PR target/102811
            * config/i386/i386.c (inline_secondary_memory_needed): HImode
            move between GPR and SSE registers is supported under
            TARGET_SSE2 and above.
            * config/i386/i386.md (extendhfsf2): Optimize expander.
            (truncsfhf2): Ditto.
            * config/i386/sse.md (sse2p4_1): Adjust attr for V8HFmode to
            align with V8HImode.

    gcc/testsuite/ChangeLog:

            * gcc.target/i386/pr102811-2.c: New test.
            * gcc.target/i386/avx512vl-vcvtps2ph-pr102811.c: Add new
            scan-assembler-times.