https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102811
--- Comment #9 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Uroš Bizjak from comment #8)
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
> index 68606e57e60..a2ebaa5ac63 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -2528,12 +2528,12 @@
> case TYPE_SSELOG:
> if (SSE_REG_P (operands[0]))
> return MEM_P (operands[1])
> - ? "pinsrw\t{$0, %1, %0|%0, %1, 0}"
> - : "pinsrw\t{$0, %k1, %0|%0, %k1, 0}";
> + ? "%vpinsrw\t{$0, %1, %d0|%d0, %1, 0}"
> + : "%vpinsrw\t{$0, %k1, %d0|%d0, %k1, 0}";
> else
> return MEM_P (operands[1])
> - ? "pextrw\t{$0, %1, %0|%0, %1, 0}"
> - : "pextrw\t{$0, %1, %k0|%k0, %k1, 0}";
> + ? "%vpextrw\t{$0, %1, %0|%0, %1, 0}"
> + : "%vpextrw\t{$0, %1, %k0|%k0, %k1, 0}";
>
> case TYPE_MSKLOG:
> if (operands[1] == const0_rtx)
> @@ -3788,12 +3788,12 @@
> case TYPE_SSELOG:
> if (SSE_REG_P (operands[0]))
> return MEM_P (operands[1])
> - ? "pinsrw\t{$0, %1, %0|%0, %1, 0}"
> - : "pinsrw\t{$0, %k1, %0|%0, %k1, 0}";
> + ? "%vpinsrw\t{$0, %1, %d0|%d0, %1, 0}"
> + : "%vpinsrw\t{$0, %k1, %d0|%d0, %k1, 0}";
> else
> return MEM_P (operands[1])
> - ? "pextrw\t{$0, %1, %0|%0, %1, 0}"
> - : "pextrw\t{$0, %1, %k0|%k0, %k1, 0}";
> + ? "%vpextrw\t{$0, %1, %0|%0, %1, 0}"
> + : "%vpextrw\t{$0, %1, %k0|%k0, %k1, 0}";
>
> default:
> gcc_unreachable ();
Yes, I'm testing
modified gcc/config/i386/i386.c
@@ -19240,7 +19240,7 @@ ix86_secondary_reload (bool in_p, rtx x, reg_class_t
rclass,
}
/* Require movement to gpr, and then store to memory. */
- if (mode == HFmode
+ if ((mode == HFmode || mode == HImode)
&& !TARGET_SSE4_1
&& SSE_CLASS_P (rclass)
&& !in_p && MEM_P (x))
modified gcc/config/i386/i386.md
@@ -2528,12 +2528,12 @@ (define_insn "*movhi_internal"
case TYPE_SSELOG:
if (SSE_REG_P (operands[0]))
return MEM_P (operands[1])
- ? "pinsrw\t{$0, %1, %0|%0, %1, 0}"
- : "pinsrw\t{$0, %k1, %0|%0, %k1, 0}";
+ ? "%vpinsrw\t{$0, %1, %0|%0, %1, 0}"
+ : "%vpinsrw\t{$0, %k1, %0|%0, %k1, 0}";
else
- return MEM_P (operands[1])
- ? "pextrw\t{$0, %1, %0|%0, %1, 0}"
- : "pextrw\t{$0, %1, %k0|%k0, %k1, 0}";
+ return MEM_P (operands[0])
+ ? "%vpextrw\t{$0, %1, %0|%0, %1, 0}"
+ : "%vpextrw\t{$0, %1, %k0|%k0, %k1, 0}";
case TYPE_MSKLOG:
if (operands[1] == const0_rtx)
@@ -2557,12 +2557,14 @@ (define_insn "*movhi_internal"
]
(const_string "*")))
(set (attr "type")
- (cond [(eq_attr "alternative" "9,10,11,12,13")
+ (cond [(eq_attr "alternative" "9,10,12,13")
(if_then_else (match_test "TARGET_AVX512FP16")
(const_string "ssemov")
(const_string "sselog"))
(eq_attr "alternative" "4,5,6,7")
(const_string "mskmov")
+ (eq_attr "alternative" "11")
+ (const_string "ssemov")
(eq_attr "alternative" "8")
(const_string "msklog")
(match_test "optimize_function_for_size_p (cfun)")
@@ -2579,15 +2581,33 @@ (define_insn "*movhi_internal"
(const_string "imovx")
]
(const_string "imov")))
+ (set (attr "memory")
+ (cond [(eq_attr "alternative" "9,10")
+ (const_string "none")
+ (eq_attr "alternative" "12")
+ (const_string "load")
+ (eq_attr "alternative" "13")
+ (const_string "store")
+ ]
+ (const_string "*")))
(set (attr "prefix")
- (if_then_else (eq_attr "alternative" "4,5,6,7,8")
- (const_string "vex")
- (const_string "orig")))
+ (cond [(eq_attr "alternative" "9,10,11,12,13")
+ (const_string "maybe_evex")
+ (eq_attr "alternative" "4,5,6,7,8")
+ (const_string "vex")
+ ]
+ (const_string "orig")))
(set (attr "mode")
(cond [(eq_attr "type" "imovx")
(const_string "SI")
+ (eq_attr "alternative" "9,10,12,13")
+ (if_then_else (match_test "TARGET_AVX512FP16")
+ (const_string "HI")
+ (const_string "TI"))
(eq_attr "alternative" "11")
- (const_string "HF")
+ (if_then_else (match_test "TARGET_AVX512FP16")
+ (const_string "HF")
+ (const_string "SF"))
(and (eq_attr "alternative" "1,2")
(match_operand:HI 1 "aligned_operand"))
(const_string "SI")
@@ -3791,7 +3811,7 @@ (define_insn "*movhf_internal"
? "pinsrw\t{$0, %1, %0|%0, %1, 0}"
: "pinsrw\t{$0, %k1, %0|%0, %k1, 0}";
else
- return MEM_P (operands[1])
+ return MEM_P (operands[0])
? "pextrw\t{$0, %1, %0|%0, %1, 0}"
: "pextrw\t{$0, %1, %k0|%k0, %k1, 0}";
modified gcc/config/i386/sse.md
@@ -11230,9 +11230,9 @@ (define_insn "*vec_extracthf"
switch (which_alternative)
{
case 0:
- return "vpextrw\t{%2, %1, %k0|%k0, %1, %2}";
+ return "%vpextrw\t{%2, %1, %k0|%k0, %1, %2}";
case 1:
- return "vpextrw\t{%2, %1, %0|%0, %1, %2}";
+ return "%vpextrw\t{%2, %1, %0|%0, %1, %2}";
case 2:
operands[2] = GEN_INT (INTVAL (operands[2]) * 2);
@@ -11245,7 +11245,7 @@ (define_insn "*vec_extracthf"
gcc_unreachable ();
}
}
- [(set_attr "isa" "*,*,noavx,avx")
+ [(set_attr "isa" "*,sse4,noavx,avx")
(set_attr "type" "sselog1,sselog1,sseishft1,sseishft1")
(set_attr "prefix" "maybe_evex")
(set_attr "mode" "TI")])
[back]
