https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103074
--- Comment #4 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #3)
> Ah, actually what I see is that sched1 swaps the order of:
> (insn 22 21 23 4 (parallel [
> (set (reg:SI 88)
> (ashiftrt:SI (reg/v:SI 84 [ a ])
> (const_int 32 [0x20])))
> (clobber (reg:CC 17 flags))
> ]) "pr103074.c":10:7 735 {*ashrsi3_1}
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (nil)))
> (insn 23 22 24 4 (set (reg:SI 2 cx)
> (reg/v:SI 84 [ a ])) "pr103074.c":10:7 77 {*movsi_internal}
> (expr_list:REG_DEAD (reg/v:SI 84 [ a ])
> (nil)))
> and doing a shift when cx is live isn't an option because the shift needs
> the hard register for this shift amount (the constraints are Ic and I is
> 0..31 constant, c is %cx register).
Schedulers should not move insns that set TARGET_CLASS_LIKELY_SPILLED_P (that
includes CREG) before reload. See the comment in sched-rgn.c,
add_branch_dependencies.
